teraflop 2 months ago | next |

This looks really cool!

A nitpick: the Verilog simulation seems to be handled by the open-source Verilator project, which is packaged as a binary WASM blob without any acknowledgement or source code. I don't think that's compliant with either of the licenses under which Verilator is distributed (LGPL-3.0 or Artistic License).

https://github.com/verilator/verilator

tnt246 2 months ago | root | parent |

There is a link to the source code of the whole vga playground in the top right of the screen.

teraflop 2 months ago | root | parent |

That's what I was looking at and what prompted me to comment. That repository contains a binary blob (src/verilator/verilator_bin.wasm) without any corresponding source code.

zokier 2 months ago | prev | next |

if you like this sort of stuff, tiny tapeout is running a demo competition. i hope we will see some interesting entries there

https://tinytapeout.com/competitions/demoscene/

pengaru 2 months ago | root | parent | prev |

For those wondering: Opportunity for new submissions closed Sept. 6th apparently...

  > 2. Will there be any extension to the deadline? No, it’s September 6th.

  > 4. When will the competition be judged? 2 weeks after 75% of the boards have been received by entrants (estimated June 2025).

KallDrexx 2 months ago | prev | next |

This is awesome, and I really want to learn enough verilog to do a tiny tape out VGA chip design.

But man, 8bitworkshop really burned me out on trying to do verilog in a web IDE, and trying to set up verilator properly for local simulation with a proper IDE became such a hassle.

Ended up moving away from verilog for the moment back to normal software projects. I really want to get back in, but I really don't want to spend my limited coding time fighting IDEs and tooling.

Brusco_RF 2 months ago | root | parent | next |

Welcome to Hardware Design! The open-source toolchains come from hell. The closed-source options are supremely expensive and not much better

They don't call it EasyWare

15155 2 months ago | root | parent | prev |

Try SpinalHDL or Chisel and never look back.

KallDrexx 2 months ago | root | parent |

I was worrying about debuggability if I started with a higher level Verilog transpiler and didn't have a good foundation of Verilog experience.

But maybe I should just do it.

bgnn 2 months ago | root | parent |

a cheap FPGA kit is the best way to start learning IMHO.

Xilinx (now AMD) and Altera (now Intel) free tools are quite good.

bgnn 2 months ago | prev | next |

Cool. Reminds me of a course project I did 12 years ago (bacholers..) on an FPGA [1]. I used the ADC on the FPGA board to read the line input audio signal, implemted a VGA driver and a VU meter, implemented a 32-bin FFT to create the VU Meter inputs, and finally implemented a 1 bit delta-sigma modulator to drive a speaker to create the audio back. All in Verilog, on a 100$ FPGA board (Spartan 3 FWIW) in 2 weeks. Good times..

[1] Demo: https://www.youtube.com/watch?v=n3hphFfxZMQ

jmpz 2 months ago | prev |

This looks like a really fun way to experiment while learning Verilog!